Download Program Atmel 89S51 dgn ISP

Download program ke IC mikrokontroler Atmel 89S dapat dilakukan secara ISP (In System Programming) yaitu langsung di rangkaian sistem tanpa perlu memindahkan IC ke perangkat downloader khusus. Yang diperlukan adalah kabel ISP tersambung ke kaki 6 s/d 9 beserta Vcc dan GND. Cara download program adalah sebagai berikut. Pastikan program sudah berhasil di-compile sehingga tercipta file .hex di folder program. Pastikan pula kabel ISP tersambung ke port paralel komputer dan ke mikrokontroler serta rangkaian mikrokontroler sudah diberikan catu. 1. Panggil program Atmel | Microcontroller ISP Software dari start menu. 2. Klik Option lalu Select Devices. Pilih jenis seri IC yang ingin di-write, pilih Byte Mode (download mode byte lebih cepat), serta pastikan angka XTAL sesuai dengan XTAL yang dipakai di rangkaian. Lalu klik OK. 3. Klik icon Load Buffer lalu pilih file hex yang ingin di-write ke dalam IC. 4. Klik icon Auto Program. Software akan melakukan erase program terdahulu, write program, lalu verify hasilnya. Jika lancar maka user akan dipersilakan untuk melakukan lock (proteksi program) mulai dari Lock 0 (tanpa proteksi) sampai Lock 3 (paling secure). Setelah semua proses selesai klik menu Instructions lalu Run Target untuk menjalankan program di hardware.

BAHASA ASSEMBLY

Pemrograman AT89S51 bahasa Assembly

Bahasa Assembly adalah bahasa pemrograman tingkat rendah. Dalam pemrograman komputer dikenal dua jenis tingkatan bahasa, jenis yang pertama adalah bahasa pemrograman tingkat tinggi (high level language) dan jenis yang kedua adalah bahasa pemrograman tingkat rendah (low level language). Bahasa pemrograman tingkat tinggi lebih berorientasi kepada manusia yaitu bagaimana agar pernyataan-pernyataan yang ada dalam program mudah ditulis dan dimengerti oleh manusia. Sedangkan bahasa tingkat rendah lebih berorientasi ke mesin, yaitu bagaimana agar komputer dapat langsung mengintepretasikan pernyataan-pernyataan program.Kelebihan Bahasa Assembly: 1. Ketika di-compile lebih kecil ukuran 2. Lebih efisien/hemat memori 3. Lebih cepat dieksekusi Kesulitan Bahasa Assembly: 1. Dalam melakukan suatu pekerjaan, baris program relatif lebih panjang dibanding bahasa tingkat tinggi 2. Relatif lebih sulit untuk dipahami terutama jika jumlah baris sudah terlalu banyak 3. Lebih sulit dalam melakukan pekerjaan rumit, misalnya operasi matematis BAHASA ASSEMBLY MCS-51 Dalam program bahasa assembly terdapat 2 jenis yang kita tulis dalam program yaitu: 1. Assembly Directive (yaitu merupakan kode yang menjadi arahan bagi assembler/compiler untuk menata program) 2. Instruksi (yaitu kode yang harus dieksekusi oleh CPU mikrokontroler) Klik disini untuk melihat daftar Assembly Directive dan Instruksi MCS-51. PENGGUNAAN SOFTWARE Software untuk membantu memprogram mikrokontroler MCS-51 sudah banyak tersedia. Untuk mempermudah maka dapat dipilih software yang merupakan Integrated Development Environment (IDE) yaitu software yang merupakan editor sekaligus compiler. Bahkan juga ada yang sekaligus debugger dan simulator. Salah satunya yang digunakan pada training di PRASIMAX adalah Read51. Berikut beberapa cara penggunaan software. 1. User dapat membuat program sistem single file maupun proyek (beberapa file). Klik menu File lalu pilih New File. 2. Ketik program di window editing. Software menyediakan syntax highlighting otomatis, sehingga tiap assembly directive akan diberi warna ungu dan tiap instuksi akan diberi warna biru. 3. User dapat langsung mengcompile program dengan sekali klik icon Build (F9). Ketika ada kesalahan maka user dapat langsung ditunjukkan letak dan jenis kesalahan. 4. User dapat melakukan simulasi software untuk melihat hasil kerja program. Klik IDE mode (F2). 5. User dapat melakukan debugging, bahkan melihat hasil eksekusi per step (per baris) terhadap kondisi-kondisi register dan memori di mikrokontroler. Klik Step Into (F8). Selanjutnya user dapat melakukan download program ke IC mikrokontroler untuk menguji hasilnya secara real di hardware. Klik disini untuk mengetahui caranya. Ditulis oleh: Tim Prasimax Copyright Prasimax Technology

Daftar Assembly Directive

Daftar Instruksi Bahasa Assembly MCS-51

Dalam program bahasa assembly terdapat 2 jenis yang kita tulis dalam program: 1. Assembly Directive (yaitu merupakan kode yang menjadi arahan bagi assembler/compiler untuk menata program) 2. Instruksi (yaitu kode yang harus dieksekusi oleh CPU mikrokontroler dengan melakukan operasi tertentu sesuai dengan daftar yang sudah tertanam dalam CPU)

ssembly Directive	Keterangan
EQU	Pendefinisian konstanta
DB	Pendefinisian data dengan ukuran satuan 1 byte
DW	Pendefinisian data dengan ukuran satuan 1 word
DBIT	Pendefinisian data dengan ukuran satuan 1 bit
DS	Pemesanan tempat penyimpanan data di RAM
ORG	Inisialisasi alamat mulai program
END	Penanda akhir program
CSEG	Penanda penempatan di code segment
XSEG	Penanda penempatan di external data segment
DSEG	Penanda penempatan di internal direct data segment
ISEG	Penanda penempatan di internal indirect data segment
BSEG	Penanda penempatan di bit data segment
CODE	Penanda mulai pendefinisian program
XDATA	Pendefinisian external data
DATA	Pendefinisian internal direct data
IDATA	Pendefinisian internal indirect data
BIT	Pendefinisian data bit
#INCLUDE	Mengikutsertakan file program lain

Daftar Instruksi

Instruksi	Keterangan Singkatan
ACALL	Absolute Call
ADD	Add
ADDC	Add with Carry
AJMP	Absolute Jump
ANL	AND Logic
CJNE	Compare and Jump if Not Equal
CLR	Clear
CPL	Complement
DA	Decimal Adjust
DEC	Decrement
DIV	Divide
DJNZ	Decrement and Jump if Not Zero
INC	Increment
JB	Jump if Bit Set
JBC	Jump if Bit Set and Clear Bit
JC	Jump if Carry Set
JMP	Jump to Address
JNB	Jump if Not Bit Set
JNC	Jump if Carry Not Set
JNZ	Jump if Accumulator Not Zero
JZ	Jump if Accumulator Zero
LCALL	Long Call
LJMP	Long Jump
MOV	Move from Memory
MOVC	Move from Code Memory
MOVX	Move from Extended Memory
MUL	Multiply
NOP	No Operation
ORL	OR Logic
POP	Pop Value From Stack
PUSH	Push Value Onto Stack
RET	Return From Subroutine
RETI	Return From Interrupt
RL	Rotate Left
RLC	Rotate Left through Carry
RR	Rotate Right
RRC	Rotate Right through Carry
SETB	Set Bit
SJMP	Short Jump
SUBB	Subtract With Borrow
SWAP	Swap Nibbles
XCH	Exchange Bytes
XCHD	Exchange Digits
XRL	Exclusive OR Logic

Ditulis oleh: Tim Prasimax
Copyright Prasimax Technology

The Shift Register

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The Shift Register is another type of sequential logic circuit that can be used for the storage or the transfer of binary data.

This sequential device loads the data present on its inputs and then moves or “shifts” it to its output once every clock cycle, hence the name Shift Register.

A shift register basically consists of several single bit “D-Type Data Latches”, one for each data bit, either a logic “0” or a “1”, connected together in a serial type daisy-chain arrangement so that the output from one data latch becomes the input of the next latch and so on.

Data bits may be fed in or out of a shift register serially, that is one after the other from either the left or the right direction, or all together at the same time in a parallel configuration.

The number of individual data latches required to make up a single Shift Register device is usually determined by the number of bits to be stored with the most common being 8-bits (one byte) wide constructed from eight individual data latches.

Shift Registers are used for data storage or for the movement of data and are therefore commonly used inside calculators or computers to store data such as two binary numbers before they are added together, or to convert the data from either a serial to parallel or parallel to serial format. The individual data latches that make up a single shift register are all driven by a common clock ( Clk ) signal making them synchronous devices.

Shift register IC’s are generally provided with a clear or reset connection so that they can be “SET” or “RESET” as required. Generally, shift registers operate in one of four different modes with the basic movement of data through a shift register being:

• Serial-in to Parallel-out (SIPO)  -  the register is loaded with serial data, one bit at a time, with the stored data being available at the output in parallel form.
• Serial-in to Serial-out (SISO)  -  the data is shifted serially “IN” and “OUT” of the register, one bit at a time in either a left or right direction under clock control.
• Parallel-in to Serial-out (PISO)  -  the parallel data is loaded into the register simultaneously and is shifted out of the register serially one bit at a time under clock control.
• Parallel-in to Parallel-out (PIPO)  -  the parallel data is loaded simultaneously into the register, and transferred together to their respective outputs by the same clock pulse.

The effect of data movement from left to right through a shift register can be presented graphically as:

Also, the directional movement of the data through a shift register can be either to the left, (left shifting) to the right, (right shifting) left-in but right-out, (rotation) or both left and right shifting within the same register thereby making it bidirectional. In this tutorial it is assumed that all the data shifts to the right, (right shifting).

Serial-in to Parallel-out (SIPO) Shift Register

4-bit Serial-in to Parallel-out Shift Register

The operation is as follows. Lets assume that all the flip-flops ( FFA to FFD ) have just been RESET ( CLEAR input ) and that all the outputs QA to QD are at logic level “0” ie, no parallel data output.

If a logic “1” is connected to the DATA input pin of FFA then on the first clock pulse the output of FFA and therefore the resulting QA will be set HIGH to logic “1” with all the other outputs still remaining LOW at logic “0”. Assume now that the DATA input pin of FFA has returned LOW again to logic “0” giving us one data pulse or 0-1-0.

The second clock pulse will change the output of FFA to logic “0” and the output of FFB and QB HIGH to logic “1” as its input D has the logic “1” level on it from QA. The logic “1” has now moved or been “shifted” one place along the register to the right as it is now at QA.

When the third clock pulse arrives this logic “1” value moves to the output of FFC ( QC ) and so on until the arrival of the fifth clock pulse which sets all the outputs QA to QD back again to logic level “0” because the input to FFA has remained constant at logic level “0”.

The effect of each clock pulse is to shift the data contents of each stage one place to the right, and this is shown in the following table until the complete data value of  0-0-0-1 is stored in the register. This data value can now be read directly from the outputs of QA to QD.

Then the data has been converted from a serial data input signal to a parallel data output. The truth table and following waveforms show the propagation of the logic “1” through the register from left to right as follows.

Basic Data Movement Through A Shift Register

Clock Pulse No	QA	QB	QC	QD
0	0	0	0	0
1	1	0	0	0
2	0	1	0	0
3	0	0	1	0
4	0	0	0	1
5	0	0	0	0

Note that after the fourth clock pulse has ended the 4-bits of data ( 0-0-0-1 ) are stored in the register and will remain there provided clocking of the register has stopped. In practice the input data to the register may consist of various combinations of logic “1” and “0”. Commonly available SIPO IC’s include the standard 8-bit 74LS164 or the 74LS594.

Serial-in to Serial-out (SISO) Shift Register

This shift register is very similar to the SIPO above, except were before the data was read directly in a parallel form from the outputs QA to QD, this time the data is allowed to flow straight through the register and out of the other end. Since there is only one output, the DATA leaves the shift register one bit at a time in a serial pattern, hence the name Serial-in to Serial-Out Shift Register or SISO.

The SISO shift register is one of the simplest of the four configurations as it has only three connections, the serial input (SI) which determines what enters the left hand flip-flop, the serial output (SO) which is taken from the output of the right hand flip-flop and the sequencing clock signal (Clk). The logic circuit diagram below shows a generalized serial-in serial-out shift register.

4-bit Serial-in to Serial-out Shift Register

You may think what’s the point of a SISO shift register if the output data is exactly the same as the input data. Well this type of Shift Register also acts as a temporary storage device or it can act as a time delay device for the data, with the amount of time delay being controlled by the number of stages in the register, 4, 8, 16 etc or by varying the application of the clock pulses. Commonly available IC’s include the 74HC595 8-bit Serial-in to Serial-out Shift Register all with 3-state outputs.

Parallel-in to Serial-out (PISO) Shift Register

The Parallel-in to Serial-out shift register acts in the opposite way to the serial-in to parallel-out one above. The data is loaded into the register in a parallel format in which all the data bits enter their inputs simultaneously, to the parallel input pins PA to PD of the register. The data is then read out sequentially in the normal shift-right mode from the register at Q representing the data present at PA to PD.

This data is outputted one bit at a time on each clock cycle in a serial format. It is important to note that with this type of data register a clock pulse is not required to parallel load the register as it is already present, but four clock pulses are required to unload the data.

4-bit Parallel-in to Serial-out Shift Register

As this type of shift register converts parallel data, such as an 8-bit data word into serial format, it can be used to multiplex many different input lines into a single serial DATA stream which can be sent directly to a computer or transmitted over a communications line. Commonly available IC’s include the 74HC166 8-bit Parallel-in/Serial-out Shift Registers.

Parallel-in to Parallel-out (PIPO) Shift Register

The final mode of operation is the Parallel-in to Parallel-out Shift Register. This type of shift register also acts as a temporary storage device or as a time delay device similar to the SISO configuration above. The data is presented in a parallel format to the parallel input pins PA to PD and then transferred together directly to their respective output pins QA to QD by the same clock pulse. Then one clock pulse loads and unloads the register. This arrangement for parallel loading and unloading is shown below.

4-bit Parallel-in to Parallel-out Shift Register

The PIPO shift register is the simplest of the four configurations as it has only three connections, the parallel input (PI) which determines what enters the flip-flop, the parallel output (PO) and the sequencing clock signal (Clk).

Similar to the Serial-in to Serial-out shift register, this type of register also acts as a temporary storage device or as a time delay device, with the amount of time delay being varied by the frequency of the clock pulses. Also, in this type of register there are no interconnections between the individual flip-flops since no serial shifting of the data is required.

Universal Shift Register

Today, there are many high speed bi-directional “universal” type Shift Registers available such as the TTL 74LS194, 74LS195 or the CMOS 4035 which are available as 4-bit multi-function devices that can be used in either serial-to-serial, left shifting, right shifting, serial-to-parallel, parallel-to-serial, or as a parallel-to-parallel multifunction data register, hence their name “Universal”.

These universal shift registers can perform any combination of parallel and serial input to output operations but require additional inputs to specify desired function and to pre-load and reset the device. A commonly used universal shift register is the TTL 74LS194 as shown below.

4-bit Universal Shift Register 74LS194

Universal shift registers are very useful digital devices. They can be configured to respond to operations that require some form of temporary memory storage or for the delay of information such as the SISO or PIPO configuration modes or transfer data from one point to another in either a serial or parallel format. Universal shift registers are frequently used in arithmetic operations to shift data to the left or right for multiplication or division.

Shift Register Tutorial Summary

Then to summarise a little about Shift Registers

• A simple Shift Register can be made using only D-type flip-Flops, one flip-Flop for each data bit.
• The output from each flip-Flop is connected to the D input of the flip-flop at its right.
• Shift registers hold the data in their memory which is moved or “shifted” to their required positions on each clock pulse.
• Each clock pulse shifts the contents of the register one bit position to either the left or the right.
• The data bits can be loaded one bit at a time in a series input (SI) configuration or be loaded simultaneously in a parallel configuration (PI).
• Data may be removed from the register one bit at a time for a series output (SO) or removed all at the same time from a parallel output (PO).
• One application of shift registers is in the conversion of data between serial and parallel, or parallel to serial.
• Shift registers are identified individually as SIPO, SISO, PISO, PIPO, or as a Universal Shift Register with all the functions combined within a single device.

In the next tutorial about Sequential Logic Circuits, we will look at what happens when the output of the last flip-flop in a shift register is connected directly back to the input of the first flip-flop producing a closed loop circuit that constantly recirculates the data around the loop. This then produces another type of sequential logic circuit called a Ring Counter that are used as decade counters and dividers.

the low cost S-Band signal source.

The updated circuit uses one of the latest third overtone crystals. These offer greater reliability than the fifth overtone crystals commonly used in oscillator circuits at VHF.* September 2002. - PCB now screen printed and include plated through holes. Q1 changed to  BFS17*  Feb 2005. - Crystal changed to 96.013MHz  to provide signal within the Phase 3E   S band transponder* Feb 2011. PCB changed to lead free. Solder mask added to prevent tarnishing. MSA0386 supplied as alternative to MAR3.
* Feb 2011.  New application:  For use as a frequency marker with the FUNcube dongle 64 - 1700MHz Software defined radio. The signal source generates signal every 96MHz from VHF to microwave. Use it to test antennas or check the frequency of your VHF/UHF SDR.
Click on picture below right from Mark Hammond N8MH. It's the full size version of Mark's screen using the AMSAT-UK signal source with his FUNcube dongle and WRplus V1.04 software.

                                        

PCB size is 47 x 30mm (2005-2010 shown)                           N8MH listening to 5th harmonic on 480 MHz

Circuit Diagram

Component Identification:

The input of the MAR3SM is identified by a 'dot' on the body of the device or by its lead which is cut at an angle. Some devices are marked AO3
Q1- Surface mount transistor has been changed to a BFS17 - marked as E1p
D1 - Surface mount diode is identified by the marking F2 or F2P

Component Overlay from original PCB 2001-2010                            New PCB design included in all kits from 23/2/2011.                

  

A full kit of parts is available from AMSAT-UK. Price for members is £15 inc postage.   AMSAT SHOP

=====            =====            =====            =====

A low cost signal source for 2.4 GHz. David Bowman G0MRF ( from original article in Oscar News)

With Oscar 40 now safely in orbit and with S band becoming a primary downlink for several satellites, there’s a lot of home construction and conversion of microwave equipment underway.

Unfortunately, when it comes to aligning S band receivers, microwave signals from space are not easy to find and are not ideally suited for initially tuning that ‘thing of joy and beauty’ that you have worked so hard to construct.

This signal source is a harmonic, or comb generator, which produces a series of strong outputs across the electromagnetic spectrum from VHF to 10GHz. These signals can be used to align receivers and converters or check the radiation pattern of antennas.

The circuit below uses a crystal oscillating at 96.019MHz. Its output is amplified and the signal applied to a pair of PIN diodes which produce an excellent signal at the 25^th harmonic in the S band satellite allocation.

X1 is a third overtone crystal. Unlike their fifth overtone cousins, they can be used reliably with very simple circuits. Q1 forms an oscillator, while coil L1 and capacitors C3 and C4 are the resonant circuit. C3 and C4 also form a capacitive divider which allows a small signal, with low impedance, to feed U1 a Mini Circuits MAR3. This amplifier has a gain of about 10dB from DC to over 1GHz. With 50 Ohm input and output impedances, MMIC’s have greatly simplified microwave construction. Other devices from the same manufacturer have useful gain at 10GHz and some experimental 24GHz IC’s are just becoming available.

The amplified output from U1 is AC coupled to D1, a pair of antiparallel PIN diodes The harmonics produced pass along short stripline to the edge of the PCB.

Construction.

The kit, available from Amsat-UK, has just 21 components and can be constructed in about 30 minutes. The PCB has tracks on both sides and now uses plated through holes to pass signals through the PCB. 

When complete, the board can be mounted in a screened enclosure. I found it was possible to solder the board’s output stripline directly to the center conductor of an RF connector. In my prototype, I selected a chassis mounting BNC socket, but any other microwave connector would be suitable. To increase mechanical strength, I added solder tags to the BNC mounting bolts and soldered these to the ground plane on the component side of the PCB. My ‘antenna’ is simply a short length of wire mounted in a BNC plug. The body of the metal enclosure acts as a ground plane. The results have been quite pleasing. The circuit oscillates at 96.019 MHz and produces an S9+ signal just below the engineering beacon on the AO-40 S1 transponder. It was also possible to hear the 108^th harmonic on a 10GHz receiver, although with this particular crystal, the harmonic falls near the terrestrial, not the space allocation.

Under no circumstances should you connect this source either directly to a receiver or to a high gain antenna. The combined power produced across the spectrum could damage your receiver or travel for several kilometers causing interference.

========                        ========                            ========                    ========

Comments:

1) L1 is part of a tuned circuit. You will probably need to adjust the core in L1 for resonance. On my samples the core needed to be initially set level with the former and then turned ACW out of the former by 3 full turns.
Take care with the ferrite core, it is brittle and will crack if you use a metal screwdriver.

2) The transistor supplied with all kits after 9/2002 is the BFS17. The transistor is soldered on the track side of the PCB

3) Minicircuits appear to have removed the white dot marking the input to the MAR3SM. The input of the device can still be identified by its lead which is cut at an angle. Agilent devices are marked AO3

Test Results by Domenico I8CVS

Subj: 2.4 GHz Signal Source measurements
Date: 7/18/01 11:29:36 AM GMT Daylight Time
From: domenico.i8cvs
To: g0mrf@aol.com (G0MRF David Bowman)
Dear David,G0MRF

Finally I have made the complete measurements on your 2.4 GHz Signal Source.

First of all I have permanently
inserted a 10 dB attenuator in order do not burn out the very expensive
mixer on the HP 8555A

So the XTAL oscillator output is not -2 dBm but -2+10= 8 dBm = 6,3 mW

Here follows the accurate harmonic level measurement at the output of D1


                                  MHz             Level  dBm(50 ohm)
Fundamental, XTAL  96,015     +8,0 = 6,3 mW
# 2 harmonic   192,030             -3,0
# 3 "                 288,045             -2,0
# 4 "                 384,060             -8,0
# 5 "                 480,075             -13,0
# 6 "                 576,090             -14,0
# 7 "                 672,105             -18,0
# 8 "                 768,120             -10,0
# 9 "                 864,135             -12,0
# 10 "               960,150             -13,0
# 11 "             1056,165             -15,0
# 12 "             1152,180             -15,0
# 13 "             1248,195             -18,0
# 14 "             1344,210             -30,0
# 15 "             1440,225             -35,0
# 16 "             1536,240             -32,0
# 17 "             1632,255             -30,0
# 18 "             1728,270             -34,0
# 19 "             1824,285             -30,0
# 20 "             1920,300             -30,0
# 21 "             2016,315             -32,0
# 22 "             2112,330             -36,0
# 23 "             2208,345             -30,0
# 24 "             2304,360             -30,0     =0,001mW
# 25 "             2400,375             -34,0     =0,000398mW
# 26 "             2496,390             -30,0


NOTE:
Measurements are made with HP 141 - HP8555A spectrum analyser and 50 ohm
probe with 30 dB attenuation ON

The above figure are net not including the attenuation of 30 dB.

2400,375 MHz harmonic is very strong and I will inform you after
experimenting with an interdigital filter on the output in order to cut all
undesired harmonics from the air.

If you made measurements by yourself please let me know your figures.

In addition the Signal Source is very useful for spectrum analyser
calibration because the HP 8555A has analog frequency reading.
only.

No other signals or spurious are encountered between one harmonic
and the subsequent one.

The oscillator signal is very clean with -120 dBc of phase noise at 10 KHz
offset from the carrier.


Best 73 de I8CVS Domenico

Contoh Analisis Data Flow Diagram

1. Identifikasi Eksternal Entitas

Entitas	Input	Output
Mahasiswa	Login member Input matakuliah Edit password Penilaian (vote) Dosen	Hak Akses Input Data KHS KRS Jadwal Kuliah Transkip Nilai
Dosen	Login member Input nilai	Hak Akses Input Data KHS Transkip Nilai
Kaprodi	Login member	Hak Akses Laporan Laporan Dosen Laporan Mahasiswa
Admin	Login Admin Jadwal Kuliah Mahasiswa Dosen	Hak Akses Setup Data

2. Diagram Konteks SIMAK

3.Data Flow Diagram (DFD) Level 0